SECURITIES AND EXCHANGE COMMISSION
Washington, DC 20549
FORM 6-K
REPORT OF FOREIGN PRIVATE ISSUER
PURSUANT TO RULE 13a-16 OR 15d-16 OF
THE SECURITIES EXCHANGE ACT OF 1934
For the month of July, 2005
ChipMOS TECHNOLOGIES (Bermuda) LTD.
(Translation of Registrant’s Name Into English)
No. 1, R&D Road 1
Hsinchu Science Park
Hsinchu, Taiwan
Republic of China
(Address of Principal Executive Offices)
(Indicate by check mark whether the registrant files or will file annual reports under cover of Form 20-F or Form 40-F.)
Form 20-F ü Form 40-F
(Indicate by check mark whether the registrant by furnishing the information contained in this form is also thereby furnishing the information to the Commission pursuant to Rule 12g3-2(b) under the Securities Exchange Act of 1934.)
Yes No ü
(If “Yes” is marked, indicate below the file number assigned to the registrant in connection with Rule 12g3-2(b): 82- .)
SIGNATURES
Pursuant to the requirements of the Securities Exchange Act of 1934, the registrant has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized.
| ChipMOS TECHNOLOGIES (Bermuda) LTD. | ||||
| (Registrant) | ||||
| Date: July 13, 2005 | By | /s/ S. J. Cheng | ||
| Name: | S. J. Cheng | |||
| Title: | Chairman & Chief Executive Officer | |||
EXHIBITS
| Exhibit Number | ||
| 1.1 | Press Release | |
Exhibit 1.1
Contact:
| In Taiwan R.O.C. Dr. S.K. Chen ChipMOS TECHNOLOGIES (Bermuda) LTD. +886-6-507-7712 s.k._chen@chipmos.com.tw |
In the U.S. David Pasquale The Ruth Group +646-536-7006 dpasquale@theruthgroup.com |
ChipMOS ANNOUNCES GRANT OF PATENT
FOR DDRII DRAM SUBSTRATE-ON-CHIP PACKAGING TECHNOLOGY
Hsinchu, Taiwan, July 13, 2005 – ChipMOS TECHNOLOGIES (Bermuda) LTD. (“ChipMOS” or “the Company”) (Nasdaq: IMOS) today announced that ChipMOS TECHNOLOGIES INC. (“ChipMOS Taiwan”), a subsidiary 70.3% owned by ChipMOS, has been granted an important new patent entitled “Substrate-On-Chip (SOC) Packaging Process” (Invention No. 207525) by the Intellectual Property Office of the Ministry of Economic Affairs of Taiwan. The Company has also been granted related patents in Taiwan (Utility Model No.193887), the United States (US 6,689,638) and China (ZL 01142244.0) for its SOC packaging technology in the past few years.
The newly granted patent includes claims relating to the SOC packaging process, including solvent coating, die attaching, curing, wire bonding, encapsulation and ball planting. ChipMOS’ SOC packaging technology utilizes a layer of two-stage thermosetting mixture solvent on the substrate, instead of adhesive tape applied by the substrate manufacturer which had limited the number of qualified vendors. After the substrate is heated in order to remove the solvent, the thermosetting mixture becomes a B-stage dry adhesive film, which provides improved quality and yield with lowered costs. This technology is primarily used in Fine Pitch Ball Grid Array (“FBGA”) packaging for DDRII DRAM as well as other flash memory products. ChipMOS began developing SOC packaging technology in 2000 and the technology has passed the qualification process and been adopted by some of the world’s leading integrated device manufacturers.
S.J. Cheng, Chairman and Chief Executive Officer of ChipMOS, said, “This patent grant is an important milestone for our Company. We are now in position to further extend this technology to high performance memory products and better serve the needs of our customers. ChipMOS is strongly committed to develop new testing and assembly technology and we also welcome opportunities to enter into discussions with other companies who are interested in licensing our SOC packaging technology.”
About ChipMOS TECHNOLOGIES (Bermuda) LTD.:
ChipMOS ( http://www.chipmos.com.tw ) is a leading independent provider of semiconductor testing and assembly services primarily to customers in Taiwan, Japan, and the U.S. With advanced facilities in Hsinchu and Southern Taiwan Science Parks in Taiwan and in Shanghai, ChipMOS and its subsidiaries provide testing and assembly services to a broad range of customers, including leading fabless semiconductor companies, integrated device manufacturers and independent semiconductor foundries.
Forward-Looking Statements
Certain statements contained in this announcement may be viewed as “forward-looking statements” within the meaning of Section 27A of the U.S. Securities Act of 1933, as amended, and Section 21E of the U.S. Securities Exchange Act of 1934, as amended. Such forward-looking statements involve known and unknown risks, uncertainties and other factors, which may cause the actual performance, financial condition or results of operations of the Company to be materially different from any future performance, financial condition or results of operations implied by such forward-looking statements. Further information regarding these risks, uncertainties and other factors is included in the Company’s most recent Annual Report on Form 20-F filed with the U.S. Securities and Exchange Commission (the “SEC”) and in the Company’s other filings with the SEC.